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Functionnally Asynchronous VLSI Cellular Array for Morphological Filtering of Images. Un Réseau Cellulaire VLSI Fonctionnellement Asynchrone pour le Filtrage Morphologique D'Images
https://iieta.org/sites/default/files/pdf/2020-10/ts14_6_655-664.pdf
Design Approach of the MOVIE Programmable Video Processor. Approche de Conception du Processeur Vidéo Programmable MOVIE
https://iieta.org/sites/default/files/pdf/2020-10/ts14_6_645-653.pdf
Symphonie Massively Parallel Computer: Modelling and Design. Symphonie Calculateur Massivement Parallèle Modélisation et Réalisation
https://iieta.org/sites/default/files/pdf/2020-10/ts14_6_637-644.pdf
Two Warehouse Inventory Model for Imperfect Quality Items with Allowable Proportionate Discount
https://iieta.org/sites/default/files/pdf/2020-10/38.01_05.pdf
Optimal Policies for Deteriorating Items with Preservation and Maintenance Management When Demand is Trade Credit Sensitive
https://iieta.org/sites/default/files/pdf/2020-10/38.01_04.pdf
The Analysis of the Sharing of Bicycles
https://iieta.org/sites/default/files/pdf/2020-10/38.01_03.pdf
The Research on Contrast Between Dan System of Chinese Wushu and Belt System of Karate
https://iieta.org/sites/default/files/pdf/2020-10/38.01_02.pdf
Canny-Deriche Optimized Algorithm Adequation on DSP's Architecture Using SynDEx Environment. Adéquation de l'Algorithme de Canny-Deriche Généralisé sur Architecture DSP avec l'Environnement SynDEx
https://iieta.org/sites/default/files/pdf/2020-10/ts14_6_625-635.pdf
From the Architectural Design to the Algorithm. An Example: the Deriche Edge Detector. De L'Architecture à L'Aalgorithme. Un Exemple: le Détecteur de Contours de Deriche
https://iieta.org/sites/default/files/pdf/2020-10/ts14_6_615-623.pdf
Study of the Impact Slice Open Block Type Village on Surrounding Traffic Capacity
https://iieta.org/sites/default/files/pdf/2020-10/38.01_01.pdf
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