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(127, k, d) Reed-Solomon Code with Erasures: Simulation and Field Programmable Gate Arrays (FPGA) Design. Code Reed-Solomon (127, k, d) avec Effacements: Simulation et Conception sur Réseaux de Circuits Programmables (FPGA)
https://iieta.org/sites/default/files/pdf/2020-10/ts16_4_331-341.pdf
