Mujammal Ahmed Hasan Mujammal
| Abdelhafidh Moualdia | Giulio Lorenzini* | Salah Boulkhrachef | Patrice Wira | Mohammed Abdulelah Albasheri
© 2024 The authors. This article is published by IIETA and is licensed under the CC BY 4.0 license (http://creativecommons.org/licenses/by/4.0/).
OPEN ACCESS
This paper proposes an innovative enhancement to conventional Direct Power Control (DPC) using Neural Network Control (NNC), presenting an effective alternative control method for three-phase Pulse Width Modulation (PWM) rectifiers. Traditional DPC techniques struggle with dynamic non-linearity and system uncertainties, leading to issues such as limited resolution, lack of adaptability, interpolation errors, sensitivity to noise, overshooting, and distorted grid currents. To address these challenges, the proposed NNC algorithm replaces the PI controller of the DC link voltage, hysteresis comparators for active and reactive power, and the lookup table. The NNC algorithm is distinguished by its nonlinear mapping capabilities and real-time parallel processing. The effectiveness of the proposed approach was validated through experimental and simulation results, using the DSpace DS1103 card along with MATLAB and Control Desk software. The Total Harmonic Distortion (THD) of the grid current in simulation and experimental results is recorded as 1.20% and 4.68%, respectively demonstrating significant improvements in overall system performance in both steady and transient states, proving the efficiency, robustness, and effectiveness of the NNC algorithm compared to traditional methods.
direct power control, neural network control, pulse with modulation rectifiers, hysteresis comparators, nonlinear mapping
Over the past decades, power converters have been a hot issue in industrial applications, due to the rapid progress of flexible alternating current transmission systems [1], especially in the applications associated with renewable energy sources such as solar and wind power [2, 3], smart grid [4], distributed generation systems [5-7], motor drives, the microgrids [8], etc.
A DPC based on the slide mode conception (SMC) is presented in the study [9] to simplify the design control and regulate the actual active and reactive powers without using current control loops and the rotating coordinate transformation involved. Although SMC-DPC) achieved a quicker rectifying reaction and further robustness against uncertainty parameters, the unstable tracking, especially in the steady state, remains a significant issue that requires reconsidering the control systems. To tame this trouble, the Hamiltonian system based on Port-Controlled (PCH-DPC) is designed to use the dissipative conduct of the converter system and its flatness property [10, 11], but ripple still appears as a distorted sign in the active and reactive waveforms.
One of the popular strategies of DPC, predictive control (PC) in an intuitive way, determines the vector sequence of voltage and computes duty cycles in each sampling period to grasp the multivariable case, system restrictions, and nonlinearities [12, 13]. Although, the PC-DPC method carries out worthy closed-loop comportment. Nevertheless, an inaccurate sequential voltage could cause unwanted performance. To resolve trouble like this, redesignation of sequential voltage [14] is presented, but it suffers an extra computational burden. In order to obviate such computational issues, a novel concept is proposed to assume static vectors of voltage without using the angular position of grid voltage or the virtual-flux vector [15]. In the study [16], a simple compensation term is included in the power reference to simplify and improve DPC performance.
The need for the DPC strategy for control feedback increases the complexity and computational processes; hence, the robustness of the system is decreased. Another issue of the conventional DPC strategy is the requirement of efficient control to overcome the overshot of the dynamic response and achieve a stable steady state performance free of oscillations to obtain the stability of the system. Otherwise, regulation of the rectifier output voltage lies directly in the abilities of the DC link voltage controller [17] to ensure a constant value of DC voltage to meet the needs of electronic devices that require a stable DC link voltage even if the AC input is fluctuating. In spite of the high value of DC link voltage rises the rectifier efficiency, however, high DC link voltage causes much damage as the stress of converter components, insulation Breakdown, size and cost requirements of capacitors and inductors, and loads compatibility or other systems.
The motivation of the article is to overcome the limited behaviour of the hysteresis controllers of active and reactive powers, the lookup table drawbacks, and avoid the restricted and inflexible performances of PI controllers by replacing those components with two NNCs, the first one instead of (Hysteresis comparators of active and reactive powers and lookup table), while the second one is instead of PI controllers of DC-Link voltage.
The NNC-DPC technique is proposed due to the following reasons:
The rest of the paper is organized as follows. In Section 2, modelling of AC-side and DC-link voltage is introduced. Section 3 depicts the classical direct power control. Section 4 presents the proposed NNC–DPC algorithm. Sections 5 and 6 presents the simulation results and experimental validation findings. Finally, it ended with a conclusion.
2.1 AC-Side modeling
The PWM rectifier is modelled as indicated in Figure 1, considering that, the grid voltage is balanced [5, 19], and it can be written as follows:
Figure 1. Configuration of two-level PWM rectifier
$v_s=R_s i_s+L_s \frac{d i_s}{d t}+u$ (1)
whereas, $V_s, i_s$, and $u$ are the grid voltage, the input current, and the rectifier voltage, respectively, $R_S$ and $L_S$ are the equivalents of series resistance and inductance, respectively. The model (1) can be characterized in the stationary $\alpha-\beta$ [20] frame as:
$\left[\begin{array}{l}v_{s \alpha} \\ v_{s \beta}\end{array}\right]=\left[\begin{array}{cc}R & 0 \\ 0 & R\end{array}\right]\left[\begin{array}{l}i_{s \alpha} \\ i_{s \beta}\end{array}\right]+L \frac{d}{d t}\left[\begin{array}{l}i_{s \alpha} \\ i_{s \beta}\end{array}\right]+\left[\begin{array}{l}u_{s \alpha} \\ u_{s \beta}\end{array}\right]$ (2)
As a result, actual active and reactive models of powers can be defined as follows:
$P=\frac{3}{2}\left(v_{s \alpha} i_{s \alpha}+v_{s \beta} i_{s \beta}\right), Q=\frac{3}{2}\left(v_{s \beta} i_{s \alpha}-v_{s \alpha} i_{s \beta}\right)$ (3)
where, $v_{s \alpha}, v_{s \beta}, i_{s \alpha}, i_{s \beta}$, denote the grid voltages and their currents in the $(\alpha-\beta)$ frame, while $P$ refers to the actual power and Q denotes the reactive power. The main objectives of controlling the PWM rectifier are to address the DC link voltage at the required level and provide the desired reactive power to improve the quality power $(\cos \varphi \rightarrow 1)$.
2.2 DC-Link voltage modeling
Ignoring the converter losses, the power fluctuations of the DC-link capacitor can be written as:
$P_c=C V_{d c} \frac{d V_{d c}}{d t}=P_i-P_l$ (4)
Considering that
$P_l=V_{d c} * I_{d c}$ (5)
where, $P_i, P_l$, and $P_c$ are the supplied power from the grid side, consumed power by the load, and stocked power in the capacitor, respectively, $C$ and $V_{d c}$ are the DC-link capacitor and its voltage. Substituting (5) into (4) yields:
$\frac{d V_{d c}}{d t}=\frac{P_i}{C} \frac{1}{V_{d c}}-\frac{1}{C} I_{d c}$ (6)
The goal is to limit and stabilize the DC-link voltage fluctuations via a strategy of control more flexible with turbulences that result in costly damage to the converter [21].
Figure 2. Control strategies of PWM rectifier
Figure 3. Configuration scheme of classical direct power control (C-DPC)
Figure 2 presents four strategies of PWM rectifier control, with DPC as one of the crucial methods. First, the modelling of DPC is briefly discussed in this section. Figure 3 depicts the typical setup of DPC for a three-phase PWM rectifier.
3.1 Direct power control strategy
The DPC method is inspired by (DTC) approach [14, 22] and exploited in the electrical machine domain. The control vector is chosen using a well-defined switching table, as given in Figure 4. This table relies on three inputs, the angular position of grid voltage given by the Eq. (11) and the two instantaneous errors Δp, Δq. The active power reference comes from the regulation of DC-link voltage, whereas, the reactive power reference is assumed equal to zero to ensure the unity power factor (UPF) [23]. Figure 5 detailed configuration of DPC method.
Figure 4. Generated switching states via LUT and hysteresis comparators
The DC-link voltage is maintained by adjusting the active power, and the (UPF) is fulfilled under an operating control of the reactive power to close to zero [24].
3.2 DC-link voltage control
An essential task of the PI controller is to address $V_{d c}$ to certain reference values [25]. Eq. (7) describes the mathematical formula of the PI transfer function:
$\frac{v(t)}{v^*(t)}=\frac{k_p s+k_i}{C s^2+k_p s+k_i}=\frac{\frac{C}{k_p}\left(s+\frac{k_i}{k_p}\right)}{s^2+\frac{k_p s}{C}+\frac{k_i}{C}}$ (7)
$k_p=2 \cdot \varepsilon \cdot \omega_n \cdot C, k_i=C \cdot \omega_n^2$
It’s structure with the system anti-windup method is given in Figure 5 [26, 27]:
DPC is founded on instantaneous power calculation. In Eqs. (8)-(11), conventional formulas determine the instantaneous power P and Q in α-β reference frame.
$\left[\begin{array}{l}i_\alpha \\ i_\beta\end{array}\right]=\sqrt{\frac{2}{3}}\left[\begin{array}{ccc}1 & -\frac{1}{2} & -\frac{1}{2} \\ 0 & \frac{\sqrt{3}}{2} & -\frac{\sqrt{3}}{2}\end{array}\right] \cdot\left[\begin{array}{l}I_{s 1} \\ I_{s 2} \\ I_{s 3}\end{array}\right]$ (8)
$\left[\begin{array}{l}v_\alpha \\ v_\beta\end{array}\right]=\sqrt{\frac{2}{3}}\left[\begin{array}{ccc}1 & -\frac{1}{2} & -\frac{1}{2} \\ 0 & \frac{\sqrt{3}}{2} & -\frac{\sqrt{3}}{2}\end{array}\right] \cdot\left[\begin{array}{l}v_{s 1} \\ v_{s 2} \\ v_{s 3}\end{array}\right]$ (9)
$\left[\begin{array}{l}P \\ Q\end{array}\right]=\left[\begin{array}{cc}v_\alpha & v_\beta \\ -v_\beta & v_\alpha\end{array}\right] \cdot\left[\begin{array}{l}i_\alpha \\ i_\beta\end{array}\right]$ (10)
$\theta=\arctan \left(\frac{v_\alpha}{v_\beta}\right)$ (11)
Figure 5. PI controller with system anti-windup
The knowledge of the grid voltage sector is required to determine the switching states, so the α-β plan is divided into twelve sectors, which can be proven in Figure 6(a), These sectors can be determined by the following subsequent relationship.
$\frac{\pi}{6}(N-2) \leq\left(\theta_N-1\right) \leq \frac{\pi}{6}(N-1) \,N=1,2,3, \ldots$ (12)
To create the instantaneous error of P and Q, a comparison process is achieved between the actual active and reactive powers and their references. Hysteresis comparators deal with the active and reactive errors to generate the control pulses (0 or 1) required to formulate the lookup table as shown in Figure 6(b).
Figure 6. (a) Sectors Scheme in α-β stationary frame, (b) Hysteresis comparator scheme
The selection of the sector’s voltage is synthesized and founded on the changes in sign and magnitude of the active and reactive power for each sector. Take $\theta_1$ As an example, Table 1 shows the active and reactive power signs, hence, the switching table voltages in $\theta_1$ is obtained as depicted in Table 2.
The comparison process between the active and reactive power references and their actual values is achieved via the conventional hysteresis comparator to generate the output control pulse (0 or 1) as shown in Figure 6(b). To form the lookup table voltages $V(\mathrm{sa}, \mathrm{sb}, \mathrm{sc})$, the phase angle $\theta_N$ and switching pulses generated via the hysteresis comparators $H_p$ and $H_Q$ are configured as shown in Table 3.
Table 1. Variation of active and reactive power signs
|
dP/dt |
|
dQ/dt |
|
|
if ($H_p$ =1)>o |
if ($H_p$ =1)<o |
if ($H_Q$ =1)>o |
if ($H_Q$ =1)<o |
|
V2,V3,V4 and V5 |
V1 and V6 |
V1, V2 and V3 |
V4, V5 and V6 |
Table 2. Switching table for sector 1
|
|
$H_Q$=1 |
$H_Q$=0 |
|
$H_p$=1 |
V2 |
V5 |
|
$H_p$=0 |
V1 |
V6 |
Table 3. Lookup table of classic direct power control strategy
|
DP |
DQ |
θ1 |
θ2 |
θ3 |
θ4 |
θ5 |
θ6 |
θ7 |
θ8 |
θ9 |
θ10 |
θ11 |
θ12 |
|
1 |
1 |
V5 |
V5 |
V6 |
V6 |
V1 |
V1 |
V2 |
V2 |
V3 |
V3 |
V4 |
V4 |
|
1 |
0 |
V3 |
V3 |
V4 |
V4 |
V5 |
V5 |
V6 |
V6 |
V1 |
V1 |
V2 |
V2 |
|
0 |
1 |
V6 |
V1 |
V1 |
V2 |
V2 |
V3 |
V3 |
V4 |
V4 |
V5 |
V5 |
V6 |
|
0 |
0 |
V1 |
V2 |
V2 |
V3 |
V3 |
V4 |
V4 |
V5 |
V5 |
V6 |
V6 |
V1 |
4.1 NNC Based on the dataset of hysteresis controllers and lookup table
Many drawbacks are associated with the active and reactive hysteresis and lookup table performances of the conventional DPC technique. The limited performance, high rate of ripple in the current lines of the grid, slow dynamic response of the system, and a wrong selection vector coming from the lookup table can adversely affect the overall performance of the converter, furthermore, the computational burden of the LUT impacts on the response for the entire technique.
To overcome all of these cons, an NNC controller has been replaced instead of the three components (hysteresis comparators of active and reactive power and lookup table). This NNC has two hidden layers with sigmoid functions consisting of 20 neurons in each hidden layer. It has 7 inputs, errors of active and reactive power (∆P, ∆Q) with their precedent values of error $Z^{-1}$, $Z^{-2}$ and sector $\theta_N$, respectively, while the outputs are the control switching pulses of the rectifier (Sa, Sb, and Sc) as shown in Figure 7.
Figure 7. Closed loop scheme NNC based on hysteresis controller with LUT
4.2 NNC based on the dataset of PI DC link voltage control
The confined behaviour of the PI controller expands the peak overshoot and ripple in active power and effects directly on the dynamic response of the system not only in the transient state but also in the steady state. To remediate all cons, an artificial neural network control has been substituted for the PI controller with one hidden layer consisting of 20 neurons, where, its input is errors of DC-link voltage, $Z^{-1}$ and $Z^{-2}$, while the output is $I_c(A)$ as shown in Figure 8.
Figure 8. Structure of hidden layers closed loop NNC based on PI controller
To predict, optimize, and gain an effective insight into the proposed NNC-DPC algorithm behaviour, the simulation process is achieved under the Matlab/ Simulink environment. Figure 9 shows the configuration of the proposed algorithm. The parameters of the system and load are illustrated in Tables 4 and 5, respectively.
Figure 9. Configuration of proposed NNC-DPC algorithm
5.1 Steady state performance
To test the stability and convergence of the system, a numerical simulation process is achieved. The reference DC bus voltage is set as 170V and the reference reactive power is fixed as zero to ensure the unity power factor.
Figure 10 shows the simulation process outcomes, it can be seen that the proposed algorithm achieved a stable steady state performance free of the broadband oscillations, where the actual DC link voltage, active and reactive powers track accurately their references with a minimum rate of harmonics as shown in Figures 10 (A, C, and B). In Figure 10 (D), it’s clear that the current has a sinusoidal waveform free of significant ripples and in phase with the grid voltage, which proves the efficiency of the proposed algorithm, where the efficient transferred power from the source to load is consumed and there is no significant reactive power flow. It can be noted the efficiency of the proposed NNC-DPC algorithm via the rapid tracking in charging the initial power of the inverter capacitor as shown in the shaded zones in Figure 10.
Figure 10. Simulation results: Steady-state performance of proposed NNC-DPC algorithm
5.2 Dynamic response test
Figure 11 shows the dynamic response of the proposed algorithm, where the reference DC bus voltage is set as 170V, then stepped up to 220V at t=0.2s, and then stepped down to 180V at t=0.4s. It can be observed that the proposed algorithm was robust and efficient, where the actual DC link voltage, active and reactive powers follow accurately their references and achieved a fast response to the reference variation of the DC voltage without overshoot and a minimum rate of ripples (THD=1.24%). The unity power factor can be described via Figure 11 (F); it can be seen that the current and voltage of the power source are in the same phase and have sinusoidal waveforms, which refers to the less flow of reactive power from the source to the DC load.
Figure 11. Simulation results: Dynamic response performance of the proposed NNC-DPC algorithm
To obtain the empirical observation, and causal inference and validate the proposed NNC-DPC algorithm, the experimental tests were carried out via the DSPACE DS 1103 hardware ordered by MATLAB and control desk software [28]. Tables 4 and 5 show the parameter description used in the experiments, while Figure 12 showcases the total harmonic distortion THD of current for proposed NNC-DPC algorithm. Figure 13 illustrates the experimental platform components used to implement the proposed algorithm. It contains a three-phase IGBT with an anti-paralleling diodes-based PWM rectifier. Three sensors of current measure inputs currents (Ia, Ib) and DC-link current Iload, respectively, in addition, three sensors of voltage also are used to measure the voltage inputs of the grid (Va and Vb) and DC-link voltage Vdc, respectively.
Table 4. Platform parameters of DPC strategy
|
Parameter |
Value |
Unit |
|
Phase Voltage (RMS) |
53 |
volt |
|
Frequency of Grid Voltage |
50 |
Hz |
|
Nominal AC Filter (Resistance) |
2 |
Ω |
|
Nominal AC Filter (Inductor) |
20 |
mH |
|
Nominal DC-Link Voltage |
170 |
volt |
|
Sampling Frequency |
10 |
kHz |
Table 5. Parameters of load (DC motor)
|
Parameters of Load (DC Motor) |
Value |
Unit |
|
Armature Voltage |
220 |
Volt |
|
Armature Current |
9 |
A |
|
Armature Inductance La |
0.0830 |
mH |
|
Armature Resistance Ra |
2.3182 |
Ω |
|
Rotor Ineria J |
0.0138 |
Kg.m2 |
|
Rated Speed |
1470 |
rpm |
|
Power |
1.5 |
Watt |
|
Torque Coefficient K |
1.2379 |
N.m/A |
|
Friction Coefficient F |
0.002 |
N.m/Rad |
Figure 12. Total harmonic distortion THD of current for proposed NNC-DPC algorithm
Figure 13. Experimental test setup
6.1 Steady state performance
This experiment aims to analyze, understand, and characterize the behavior of the proposed algorithm under stable operating conditions to provide insights into the stability and efficiency of the overall system.
The reference DC link voltage and reactive power are imposed as 170V and zero VAR, respectively.
Figure 14. Experimental results of DC bus voltage performance under steady state test
Figure 15. Experimental results of active power performance under steady state test
Figure 16. Experimental results of reactive power performance under steady state
Figures 14-16 show the DC bus voltage, and active and reactive power performances, respectively. The effectiveness and robustness of the system appear via the ability of control to track accurately the desired reference signals and maintain the outcomes of the system in line with the desired values with a minimum broadband oscillation due to the predictive character of the proposed NNC-DPC algorithm.
6.2 Dynamic response test
This experiment aims to analyze and understand the performance of the control system and test how the proposed algorithm reacts to sudden changes over time. In order to achieve this process, the reference DC bus voltage is posed as 170V, then stepped up to 220V at t=33s, and then stepped down to 180V at t=72s. The reference reactive power is set as zero VAR.
The stability of control appears via the accurate tracking with a minimum rate of harmonics and was able to avoid the significant. While the robustness of the control system clearly appeared by the fast dynamic response, it can be observed via the short settling time and non-overshoot as shown in Figure 17.
Figure 18 illustrates the dynamic response of the active power; it can be seen that the actual active power tracks accurately its reference in the steady and transient states. The proposed algorithm achieved a fast dynamic response to the sudden changes and was able to track the variable reference active power without chattering and able to minimize the significant oscillations. It ensured a stable and robust performance
Figure 17. Experimental results of the proposed NNC-DPC, performance dynamic response of Vdc link voltage
Figure 18. Experimental results of proposed NNC-DPC, active power dynamic response performance
Figure 19. Experimental results of reactive power performance of the proposed NNC-DPC technique
Figure 20. Experimental results of proposed NNC-DPC algorithm, DC link voltage, P &Q waveforms
Figure 21. Experimental results of proposed NNC-DPC algorithm, current and voltage waveforms
Figure 22. Experimental results of current and voltage performance of the proposed NNC-DPC technique
The reactive power is an important sign to recognize the power flow from the source to the load, where the minimum value of reactive power means that the major real active power is utilized via the load and vice versa. Figure 19 shows the reactive power waveform. It can be noted that the proposed algorithm was able to minimize the reactive power rate, reduce the energy losses, and decrease the significant ripples that distort the current line. The proposed algorithm achieved a stable and robust performance, where the actual reactive tracks its reference with small broadband oscillations.
To observe the dynamic response of the proposed algorithm in real-time, the DC bus voltage and active and reactive power are presented via the oscilloscope as shown in Figure 20. It’s clear the smooth and accurate tracking of the system, where the waveforms were free of the significant oscillation and the dynamic control response was fast and free if overshoot.
Figures 21 and 22 show the unity power factor, it is clear that the current and voltage of the source have a zero phase difference which proves that the proposed algorithm transfers efficiently the actual maximum power between the source and DC load. Smooth sinusoidal waveforms of current and voltage refer to the ability of the proposed algorithm to reduce the harmonics, (experimental THD of the current line is 4.68%) which means a stable performance.
In this research, a novel NNC-DPC approach for a three-phase PWM rectifier is introduced. The assumed technique demonstrated its competence and adaptability, a significant improvement in the system's transient responsiveness and steady-state performance. The experimental and simulation results proved the efficiency and robustness of the proposed algorithm; it was able to overcome the major defects of the conventional DPC via using a powerful machine-learning algorithm enabled to achieve superior behavior, good regulation, and accurate tracking not only in dynamic fast response but also in the stable steady state performance. The proposed algorithm transferred efficiently the actual power from the source to the DC load with minimum energy losses, which appeared via the smooth sinusoidal waveforms of current and voltage of the source (experimental THD is 4.68 %, and simulation THD is 1.20%).
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