Analytical Modeling and Experimental Validation of Common Mode Impedance in a Low- Voltage DC Micro-Grid

Efficiency, productivity, and power quality stand as the pillars of modern electrical infrastructure. The judicious selection and operation of energy-efficient equipment not only curtail costs but also yield environmental dividends by minimizing energy wastage. A dependable power supply, coupled with high-quality performance, underpins seamless operations, thereby augmenting productivity and curtailing downtime. Moreover, the maintenance of stable voltage and current levels serves as a shield for delicate electronics, averting potential damage and operational glitches. These elements are interconnected: heightened efficiency translates to reduced energy consumption, directly bolstering productivity. Concurrently, the assurance of reliable power and superior quality amplifies equipment efficiency, further elevating productivity levels. By prioritizing these vital aspects, modern electrical installations attain peak efficiency, bolstered reliability, and contribute substantively to a more sustainable future [1-10]. Each of these elements delineates objectives and guides scientific research throughout the continuous development of electrical networks across production, distribution, and optimal energy utilization [11-17]. The cornerstone of modern systems lies in the seamless integration of intelligent electronic interfaces between energy sources and diverse loads. These interfaces act as the nervous system, facilitating the efficient transfer and management of power, while enabling sophisticated control and real-time optimization. Their impact transcends traditional sectors, revolutionizing transportation through advancements in aircraft, ship, and train efficiency, controllability, and safety. The electrification of vehicles hinges on these interfaces, ensuring optimal power flow and battery operation. Furthermore, smart grids, the backbone of a sustainable energy future, rely on these interfaces to orchestrate intelligent energy distribution. This includes real-time monitoring, dynamic optimization based on demand fluctuations, and bi-directional communication between energy producers and consumers. [18-25]. Moreover, the development of micro-grids (MGs), which can be alternating current (AC), direct current (DC), or Hybrid (AC/DC) configurations, has strengthened and improved the reliability of primary electrical installations.

Micro-grids are increasingly popular because they seamlessly integrate renewable energy sources like solar and wind power, reducing reliance on fossil fuels and promoting sustainability. Low voltage direct current (LVDC) micro-grids offer additional advantages that solidify their position as a preferred choice. Natural DC Interface: Many renewable energy sources, such as solar panels and batteries, naturally produce direct current (DC) power. LVDC micro-grids eliminate the need for multiple AC-DC and DC-AC conversions, leading to higher overall system efficiency. Reduced Losses: DC systems experience lower transmission and distribution losses compared to AC systems, particularly over shorter distances common in micro-grid applications.

Simpler Control and Protection: The inherent characteristics of DC micro-grids often simplify control strategies and protection schemes, potentially reducing system complexity and cost [26-31]. However, despite these advancements, challenges such as optimizing energy management within the micro-grid and knowledge gaps regarding long-term system behavior remain. Identifying and developing and implementing strategic solutions to address, these issues are crucial to ensure micro-grids operate within established safety and performance standards [32-35].

The seamless integration of intelligent electronic interfaces between energy sources and diverse loads, previously likened to the nervous system of modern systems, is a technological marvel. However, a hidden challenge lurks within these powerhouses: power converters. These crucial components, characterized by their high-frequency switching operations, are pivotal sources of Electromagnetic Interference (EMI) and harmonics. This interference, if not addressed, can undermine power quality and disrupt service continuity, jeopardizing the very systems it aims to enhance [36-38].

Electromagnetic Interference manifests in two primary forms: conducted and radiated. Conducted EMI utilizes cables and conductive components as its unwelcome highway, potentially disrupting the delicate operations of neighboring electronics. Imagine a whisper traveling along a wire, capable of wreaking havoc on sensitive equipment. Radiated EMI, on the other hand, behaves like a ripple in a pond, radiating outward as a transverse wave through the surrounding space.

Understanding these distinct characteristics of EMI is crucial for devising effective mitigation strategies. As electronic systems and power converters proliferate, managing electromagnetic disturbances becomes paramount. This ensures the overall reliability, performance, and smooth operation of electrical installations, a necessity in our increasingly interconnected world [39-44]. This paper specifically delves into conducted interferences, focusing on common-mode (CM) propagation [45-50]. CM propagation utilizes the protective conductor "G", serving as a propagation path, irrespective of the connection of the entire chassis and metals to the ground through equipotential bonding of the entire installation [50-54]. Rigorous EMC standards have been imposed on electrical and electronic equipment to ensure satisfactory functioning within their electromagnetic environments without introducing intolerable disturbances [55-60]. CM Impedance Identification: This section concentrates on identifying the CM impedance of three identical converters with the same power source but providing different types of charges - resistive, capacitive, and inductive. Analytical Modeling: Beginning with the elementary converter and progressing to the complete system, this section elucidates the dependence of DC micro-grid (DCMG) impedance on each converter, considering CM current propagation paths, topology, operating states, and cables [61-67], Simulation Testing and Experimental Validation: The fourth section focus on validating the analytical models through simulation testing and experimental validation. Finally, the paper concludes with a discussion of the results and their implications. This paper investigates the identification of common mode phenomena across all microgrid segments. By addressing these issues, we aim to enhance power system performance through improved power quality, reduced electromagnetic interference (EMI), and increased stability. Additionally, we expect to bolster control system robustness, optimize control performance, and prevent system malfunctions. The developed behavioral models, derived from generic electrical systems comprising passive components and voltage sources, empower engineers with predictions of electromagnetic disturbances. These mathematical models facilitate the optimization of DC micro-grid CM filters and the monitoring of micro-grids for enhanced performance and reliability.

The Common Mode propagation current takes the PE conductor as a link between different systems, knowing that safety standards IEC 60364 require that all metals (chassis) should be grounded to guarantee the persons and materials safety [76]. This grounding arrangement is crucial for all electrical installations whether it is alternative (AC) or continuous (DC). Figure 2 shows the general operating principle of a common mode current propagation system; the CM current (I_cm) propagates within all system’s conductors in the same direction and returns throw the ground conductor "G or PE". The CM voltage (V_cm) is measured among the frame and the two active conductors positive "P" and negative "N", which consequently defines two impedances referenced to the ground. The first one (Z_pg) is defined between the positive and the ground conductor, the second impedance (Z_ng) is defined between the negative and the ground conductor. The capacitive crosstalk effects caused by the previously mentioned parasitical capacities contribute to the impedance expression of (Z_pg) and (Z_ng) [63-67, 72].

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Figure 2. Common mode (CM) current propagation

3.1 Common mode impedance of the elementary converter connected to the micro-grid

Figure 3 illustrates the schematic used to calculate the common mode (CM) impedance of one of the three buck converters connected to the tested micro-grid, as shown in Figure 1 above. The employed method, known as the voltage-current (U-I) method, involves injecting a small signal voltage, as it is mentioned below in Eq. (4) into the buck converter and subsequently measuring the response [68-75].

The parasitic capacitances between the two active conductors, positive "+" and negative "-", and the ground conductor "G" are represented respectively by (C_pg1) and (C_ng1), along with the floating capacitance (C_m); which varies based on the state of the static switch of MOSFET and the diode "D" [68-75]. It is important to note that these components are clearly identified on the buck circuit diagram as indicated in Figure 3 below.

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Figure 3. Elementary buck converter scheme under study

Switching States

Online State: For a converter to be online, two conditions must be met: The converter must be powered on, the static switches of the converter must be actively controlled, or the static switches are fixed in the closed position.

Offline State: This state is met if one of the following conditions occurs: The converter is powered "off", the static switches are fixed in the open position.

The small sinusoidal signal of the voltage injected into the buck converter is given by [68-75]:

$u_{p 1}(t)=\frac{e^{j \omega_p t}-e^{-j \omega_p t}}{2 j}$     (4)

The common mode model is represented by impedance (Z_cm1) connected to the voltage source; it is given by the equation [68-75]:

$Z_{c m 1}=\frac{v_{c m 1}}{i_{c m 1}}$     (5)

In this subsection, the CM impedance calculation (Z_cm1) will be computed using expression defined by Eq. (5). In the method based on the balanced impedance hypothesis [APEC ALES]; the current (i₁) is considered equal to half of the current (i_cm1) expressed by Eq. (6), while the Eq. (7) representing the sum of the current (i_cm1) in the derived branches. In the electrical circuit shown in Figure 3, the currents (i_p1) and (i_n1) respectively given by Eqs. (8) and (9) circulate respectively in the impedances (Z_pg1) and (Z_ng1) presented by the capacitors (C_pg1) and (C_ng1); the voltages (U_pg1) and (U_ng1) respectively appear across the terminal points "P" and "G" and "n" and "G". The current (im1) expressed in Eq. (10) corresponds to the current circulating through the impedance (Z_mg1) of the capacitance (C_m1) as a function of the switching cell, it is defined from the voltage (U_mg1) between the two points "m" and "G", as depicted in Figure 3.

$i_1=\frac{i_{c m 1}}{2}$     (6)

As current is conserved; the current supplying (i_cm1) is given by the equality presented in the following equation:

$i_{c m 1}=i_{p 1}+i_{n 1}+i_{m 1}$     (7)

These currents which circulate in the branches are obtained respectively by the equations mentioned below [68-75]:

$i_{p 1}=\frac{u_{p g 1}}{Z_{p g 1}}$     (8)

$i_{n 1}=\frac{u_{n g 1}}{Z_{n g 1}}$     (9)

$i_{m 1}=\frac{u_{m g 1}}{Z_{m g 1}}$     (10)

The voltage (v_pg1) expression of the circuit constituting the closed loop "abpGa" is established as follows:

$u_{p g 1}=u_{c m 1}+\left(Z_{l f 1}+Z_{c a b l e 1}\right) i_{c m 1}$     (11)

Analogously, the voltage (U_ng1) across the closed loop "acnGa" is expressed mathematically as follows:

$u_{n g 1}=u_{c m 1}+\left(Z_{l f 1}+Z_{cable1 }\right) i_{c m 1}$     (12)

Concerning the state of the loop circuit "acndmGa"; when both switches are open, the expression of voltage (U_mg1) is represented by Eq. (13) below. It should be noted that when both switches are opened simultaneously, the converter operation case is called offline case.

$u_{m g 1}=u_{c m 1}+\left(Z_{l f 1}+Z_{conect1 }\right) i_{c m 1}+u_{l 1}$     (13)

In the case where the diode is closed, according to the loop circuit "acndmGa", as shown in Figure 3, the voltage Umg1 expression is established as given by Eq. (14):

$u_{m g 1}=u_{p g 1}=u_{c m 1}-\left(U_{z_{conect\ 1}}+U_{z f 1l}\right)$     (14)

However, when the diode is open, according to the loop circuit "abpmGa", the voltage (U_mg1) expression is described by Eq. (15):

$u_{m g 1}=u_{n g 1}=u_{c m 1}-\left(U_{z_{conect\  1}}+U_{z f 1 l}\right)$     (15)

These both Eqs. (14) and (15) make it possible to describe the possible operating case to be studied; the online operation of the converter. Besides, when the converter is offline, the load voltage and current are respectively expressed bellow as follows [68-75]:

$u_{l 1}=Z_O i_{l 1}$     (16)

where, Z_o is the load impedance.

The current (i_l1) is equal to the value previously given by Eq. (10):

$i_{l 1}=i_{m 1}$     (17)

However, when the diode is closed, it shorts the load, it can be deduced that presented below in Eq. (18).

$u_{l 1}=0 ~V$     (18)

Indeed, it can be noted that the circuit loop "acndmGa" impedance (Z_dmG) changes if the state of the converter changes. Therefore; it can be modelled the state of the converter (online or offline) with a defined function (Q_sw) called state function, as expressed in Eq. (19).

$\left\{\begin{array}{l}Q_{s w}=1,(online \ mode ) \\ Q_{s w}=0,(online \ mode )\end{array}\right.$     (19)

When the converter is offline, the diode is open. So the both impedances (Z_l1) and (Z_mg1) are in series; they are crossed by the same current. Otherwise, if the converter is online, the voltage (v_l1) is zero. Consequently,  it is possible to combine the impedance (Z_dmG) of the converter in both cases of online and offline operation;as illustrated in Figure 3 following the "acndmGa" loop circuit and expressed by Eq. (20):

$Z_{d m G 1}=Z_{C m g 1}+Q_{s w}(t) Z_{l 1}$     (20)

Consequently, it can be analytically expressed the common mode current (CM) flowing in the circuit by Eq. (21):

$i_{c m 1}=\frac{u_{n g 1}}{Z_{n g 1}}+\frac{u_{p g 1}}{Z_{p g 1}}+\frac{u_{m g 1}}{Z_{d m G 1}}$     (21)

Knowing this current and substituting it into Eq. (5) , it can be deduced the CM impedance expression of the single converter as shown below in Eq. (22).

$Z_{c m 1}=\left[\begin{array}{c}\frac{1}{\left(C_{n g 1}+C_{p g 1}\right) p+Z_{d m G 1}} \\ \quad+\frac{1}{2}\left(Z_{l f 1}+Z_{conect1 }\right)+Z_{cable }\end{array}\right]$     (22)

3.2 CM impedance modeling of the whole DC micro-grid

This subsection identifies the DCMG modeling system shown in the previous Figure 3, which was analyzed and its CM Impedance expression calculated as indicated by Eq. (22).

Figure 4 presents the current propagation paths (i_cm) in the DCMG; the terms (i_cm1, i_cm2 and i_cm3) respectively express the common mode currents of converters 1, 2 and 3; as mentioned in Eq. (23).

$i_{c m}=i_{c m 1}+i_{c m 2}+i_{c m 3}$     (23)

4.png

Figure 4. DCMG model of common mode current propagation paths

According to this figure of the common mode load equivalent model; it can be distinguished the CM electrical parameters as follows [68-75]:

• (Ucm and Zcm) are respectively the applied voltage of the source and the input impedance of the DCMG connected between points "G" and "a".
• (Ucm1 and Zcm1) are respectively the voltage in converter 1 and the impedance between points "G" and "b".
• (Ucm2 and Zcm2) are respectively the voltage in converter 2 and the impedance between points "G" and "c".
• (Ucm3 and Zcm3) are respectively the voltage in converter 3 and the impedance between points "G" and "d".

The DCMG impedance is calculated as follows [68-75]:

$Z_{c m}=\frac{u_{c m}}{i_{c m}}$     (24)

Substituting Eqs. (21) and (23) into Eq. (24), the following expression is obtained:

$Z_{c m}=\frac{u_{c m}}{\frac{u_{c m 1}}{Z_{c m 1}}+\frac{u_{c m 2}}{Z_{c m 2}}+\frac{u_{c m 3}}{Z_{c m 3}}}$     (25)

As indicated in Figure 4, the voltage are equal, then it can be obtained:

$u_{c m}=u_{c m 1}=u_{c m 2}=u_{c m 3}$     (26)

Consequently, after reduction and simplification, it can be directly yielded the following expression:

$Z_{c m}=\frac{1}{\frac{1}{Z_{c m 1}}+\frac{1}{Z_{c m 2}}+\frac{1}{Z_{c m 3}}}$     (27)

According to Table 1, the values of the parasitic capacitors, the connections, and the impedance of the filter are identical; the following expression can be written:

$Z_{c m}=Z_{c m 1}=Z_{c m 2}=Z_{c m 3}$     (28)

Then; it can be concluded that:

$Z_{c m}=\frac{Z_{c m 1}}{3}$     (29)

By combining Eqs. (22) and (29), Eq. (30) is derived which refers to the general form of the electrical model:

$Z_{c m}=\left[\begin{array}{c}\frac{1}{K \cdot\left(C_{n g k}+C_{p g k}\right) p+\sum_{i=1}^{i=n} Z_{d n G i}} \\ +\frac{1}{2(k+i)}\left(Z_{l f}+Z_{conectic }\right)+Z_{cable }\end{array}\right]$    (30)

where, k is the number of online converters, this variable signifies the number of converters presently in operation; i is the number of offline converters, this variable denotes the number of converters currently not in operation.

The equivalent electrical model of the DC micro-grid system, illustrated in Figure 5 and elucidated in Eq. (30), provides a comprehensive representation of its entire behavioral dynamics and characteristics [68-75].

5.png

Figure 5. Electrical model of the DCMG

The Q_sw parameter indicates the converter's state during offline operation. Z_cable, Z_connect , Z_f, C_ng, C_pg, Z_l, and C_mg are the circuit elements of DCMG system.

This study consists of validating a novel analytical model to determine the common mode impedance (CMI) of a micro-grid DC model. This comprehensive model simultaneously takes into account the influence of parasitic capacitances, load impedance and filter inductances. It thus allows a more profound comprehension  of the behavior of the common mode impedance. The model's accuracy has been rigorously validated through PSpice simulations and impedance analyzer measurements to reinforce and verify its reliability and performance.

Figure 7 contrasts the performance of two distinct converters sharing identical filter and connection configurations but differing in parasitic capacitance values. The figure elucidates the interplay between parasitic capacitance and the resulting impedance response. A low parasitic capacitance can obscure the first resonance peak associated with the load impedance, dominating the overall curve. Conversely, a higher parasitic capacitance permits the load impedance to emerge, revealing the initial resonance. Consequently, a low parasitic capacitance effectively acts as a shunt, masking the load's influence, as exemplified by the indistinguishable online and offline impedances.

Figure 8 represents the common mode impedances of the frequency of an elementary converter of a microgrid (DCMG); in correlation with the systems reported in Figures 3 and 4.

7.png

Figure 7. CM impedance spectrum of the first  converter under study;(Green) online and (Black) offline; Zcm with (Cng=Cpg=5 pF and Cm=10 pF). Second converter (Blue) online and (Red) offline; Zcm with (Cng=Cpg=200  pF, and Cm=400 pF)

8.png

Figure 8. Z_CM impedance of the elementary converter simulation model in (Blue), the measured model in (Green), the DCMG represented by the simulated model in (Red), and the measured model in (Black)

The plot visualized over the frequency range from 100Hz to 120 MHz, emphasizing the effects of different parasitic components on the overall behavior. As shown in this figure; it can be directly distinguished several types of intervals:

Interval of 100 Hz to 14.5 MHz: This segment is primarily influenced by parasitic capacitances: (C_ng, C_np, and C_m). For the DCMG, CMI arises from the parallel connection of the input capacities of the elementary converters, exerting the most significant influence in the range from 1Hz to 14,5 MHz.

Interval of 14,5 MHz to 30 MHz: In this frequency band, the impact of filter inductance likely becomes more prominent.

Interval of 30 MHz to 70 MHz: This range may see effects from the characteristics of the printed circuit board (PCB) and its connectors.

Interval of 70 MHz to 120 MHz: The response in this higher frequency spectrum is probably influenced by the impedance of the wiring used to connect the DCMG converters.

Figure 9 presents a detailed comparison between simulation results, measured data and theoretical analysis curves for the characteristic impedance of the DCMG. The excellent agreement between these three datasets underlines the robustness and accuracy of the developed model.

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Figure 9. CM impedance representation; (Red) analytical model, the (Green) measured model, and the (Black) present the simulation model of DCMG

Key points and interpretations

Model validation: The close correlation between simulation results, experimental measurements and theoretical predictions confirms the validity of the model to describe the behavior of the DCMG characteristic impedance over a wide frequency range.

Parasitic component effects: The analysis of Figure 9 allows to identify the influence of different parasitic components on the impedance in different frequency bands:

• 100 Hz to 14.5 MHz: Domination of parasitic capacitances (Cng, Cnp and Cm), in particular the input capacitance of the converters.
• 14.5 MHz to 30 MHz: Increasing influence of the filter inductance.
• 30 MHz to 70 MHz: Effects of PCB and connector characteristics.
• 70 MHz to 120 MHz: Wiring impedance dominance.

Model limitations: The slight discrepancies observed between 70 MHz and 120 MHz are attributed to interference between conductors and the PCB. These minor deviations highlight that even the most accurate models may have limitations under specific conditions.

Model scope: The results suggest that the model is applicable to a wide range of voltages in microgrids and is not limited to low voltage.

The authors would like to thank the head the and staff of (LACoSERE) Laboratory, University of Laghouat, and of Electromagnetic Compatibility Laboratory (CEM), Military Polytechnic School, Bordj El-Bahri, Algiers, Algeria.