Design and Simulation of a Multifunction Protection Relay for Generator–Transformer Units

However, the current trend of studies related to generator-transformer protection has mainly focused on enhancing the functionality of protection, such as adaptive differential protection, impedance or capability curve supported schemes, transformer-specific numerical protection devices, and machine learning-based support for fault classification algorithms. One of the notable aspects of the aforementioned studies is the fact that generator and transformer protection has been considered as separate systems or has been based on complicated parameter tuning, extensive training data, or additional measurement devices. The technical contributions of this study can be summarized as follows:

1. Integrated protection framework going beyond the function-focused paradigm:

While most existing solutions tackle the problem of protection functions one at a time, like overcurrent, differential, or frequency protection, the proposed work aims to design an integrated multifunction protection relay that includes overcurrent (ANSI 50), over-undervoltage (ANSI 59/27), and frequency (ANSI 81) protection for generator-transformer sets under one common logic system. This would minimize the need to use multiple independently programmed relays and would also provide better coordination as opposed to existing solutions.

2. Deterministic fault discrimination without using data-driven techniques:

As opposed to the more recent literature, which has focused on the use of machine learning or sophisticated pattern recognition techniques for fault detection and classification, the proposed relay utilizes deterministic and standards-compliant logic as guided by the IEEE device function definitions, which ensures transparency and simplicity of operation for the power system protection application.

3. Discrimination between explicit transients and faults by coordinated timing logic:

In numerical relays, usually time delay characteristics are used, which often lead to nuisance tripping for transients like voltage dips, frequency changes, and overcurrent conditions. In this study, it is suggested that coordination be made between definitive time verification of voltage and frequency errors, and immediate operation under severe overcurrent conditions.

4. Integration of diagnostic functions for improved coordination:

In contrast to other protection systems, which provide limited information regarding trip or no trip, this study has included fault codes, which correspond to various types of electrical faults. This will improve coordination, analysis, and situational awareness of operators for systems functioning abnormally.

5. Overall validation under changing conditions:

Unlike other studies, which have been validated under limited fault conditions, this study validates the designed relay under voltage and frequency changes, symmetrical and unsymmetrical faults, and load changes by developing a comprehensive model through MATLAB/Simulink software. The simulation results show that improved coordination and reliability can be achieved by integrating the protection scheme.

These contributions, in total, form a practical deterministic protection scheme that is applicable to the improvement of coordination and fault discrimination in the protection of generator-transformer units without the need to employ complex methodologies that are often based on data considerations.

4.1 Implementation environment and protection architecture

This protection scheme has been developed using the MATLAB/Simulink platform, which finds extensive application in the analysis and validation of protection schemes in power systems because it can simulate the dynamics of the power system. The major part of the developed protection scheme is the UPR which incorporates a variety of functions aimed at protecting the generator-transformer units.

Conventionally, protection schemes use discrete relays for protecting generators and transformers. The protection functions, namely overcurrent, voltage, frequency, and differential protection, involve adjustment in traditional protection schemes [5, 14]. In the proposed UPR scheme, different protection functions are combined under a common platform. The relay system continuously measures the three-phase voltage, current, and frequency in the system and uses decision-making algorithms to produce a single common trip signal for the concerned circuit breakers. As explained in Table 1.

Table 1. Key features of universal relay

In contrast to the conventional protection schemes that employ multiple independently programmed relays or data-driven classifiers in the generator-transformer protection scheme [14, 15], the proposed Unified Protective Relaying (UPR) provides fault discrimination in a unified deterministic logic structure in a simpler and transparent manner. In terms of performance, the UPR provides fault isolation in severe short-circuit faults in an instant of around 20 ms, as opposed to the conventional definite time protection scheme with an operating time of 200–300 ms. Furthermore, the verification logic programmed in the relay prevents the relay action during transient faults below 200 ms to prevent unwanted tripping.

4.2 Signal acquisition and sensing logic

The UPR repeatedly measures the voltage and current values of the generator-transformer units in the three-phase system. The fundamental root mean square (RMS) value of the voltage and current are calculated and compared with the predefined protection threshold levels. In digital protection systems, the effective magnitude of electrical quantities is evaluated using the RMS value. For a periodic signal x(t), the RMS value over one fundamental cycle T is defined as:

$X_{R M S}=\sqrt{\frac{1}{T} \int_0^T X^2(t) d t}$          (1)

where, x(t) represents the instantaneous electrical signal (voltage or current), and T denotes the fundamental cycle period of the waveform.

The RMS value represents the effective magnitude of the electrical signal and is widely used in digital protection algorithms and numerical relays [16, 18].

In the implemented relay model, the three-phase RMS voltages $V_{R M S}$ and currents $I_{R M S}$ are continuously calculated using this formulation and compared with the predefined protection thresholds as shown in Eq. (2) and Eq. (3)

$V_{R M S}=\sqrt{\frac{1}{T} \int_0^T v^2(t) d t}$             (2)

where, $v(t)$ is the instantaneous voltage waveform measured at the relay input and $T$ represents the fundamental cycle period of the voltage signal.

$I_{R M S}=\sqrt{\frac{1}{T} \int_0^T i^2(t) d t}$         (3)

where, i(t) denotes the instantaneous current signal measured in the system and T is the fundamental period of the current waveform.

This approach follows standard numerical relay practices. The system frequency is determined by the phase-locked loop (PLL) algorithm in the voltage signal, In the PLL-based estimation method, the instantaneous phase angle of the fundamental voltage component is tracked. The system frequency is obtained from the time derivative of the phase angle as:

$f(t)=\frac{1}{2 \pi} \frac{d \theta(t)}{d t}$       (4)

where, f(t) is the estimated system frequency, $\theta(t)$ represents the instantaneous phase angle of the fundamental voltage component obtained from the PLL, and $\frac{d \theta(t)}{d t}$ denotes the rate of change of the phase angle with respect to time.

In discrete digital implementation, the frequency can be approximated using the phase difference between successive sampling instants:

$f(k)=\frac{\theta(k)-\theta(k-1)}{2 \pi \Delta t}$        (5)

where, $f(k)$ is the estimated system frequency at the discrete sampling instant $k, \theta(k)$ and $\theta(k-1)$ represent the phase angles at the current and previous sampling instants respectively, and $\Delta t$ denotes the sampling interval.

This equation demonstrates mathematically how the PLL block in the Simulink model tracks system frequency. which is widely used in numerical relays and digital signal processing methods for power system frequency tracking [10, 16].

The relay operates in the abnormal region when the following conditions are met:

• Overvoltage (OV):                      $V_{\mathrm{RMS}} \geq V_{\mathrm{OV}}$

• Undervoltage (UV):                    $V_{\mathrm{RMS}} \leq V_{\mathrm{UV}}$

• Over frequency (OF):                $f \geq f_{\mathrm{OF}}$

• Underfrequency (UF):              $f \leq f_{\mathrm{UF}}$

• Overcurrent (OC):                    $I_{\mathrm{RMS}}>I_{\text {pickup }}$

where, V_OV, V_UV, f_OF, f_UF, and I_pickup are predefined protection levels selected based on IEEE protection standards.

When any of the above threshold conditions is satisfied, the corresponding protection element is activated and forwarded to the relay decision logic.

The selected protection thresholds follow common practices recommended in power system protection standards. The overvoltage threshold was set to 1.1 pu and the undervoltage threshold to 0.9 pu, which correspond to typical operational limits used for medium-voltage equipment protection. Likewise, the 200 ms time period used in the verification delay of the voltage and frequency protection functions is in agreement with the recommendations on the coordination of disturbance ride-through and transient immunity. This is done in order to reduce the risk of unnecessary disconnections due to system disturbances.

The system frequency is determined using a PLL method, which is based on the measurement of the voltage signal. In this method, the phase angle of the fundamental voltage component is determined, and the frequency is the time derivative of the phase angle. This approach is widely used in digital relays due to its high accuracy and robustness under dynamic system conditions [16, 18].

4.3 Fault classification and decision logic

To improve the transparency of the protection scheme and aid in coordination, the UPR scheme adopts a systematic fault-coding scheme. Each fault detected is provided with a distinct fault code depending on the protection function that caused the relay to operate, as shown in Table 2.

Table 2. Fault code keys

The fault classification scheme used follows the concepts of device function as proposed by ANSI, which helps to achieve improved diagnostic capability, as suggested by modern numerical relay schemes [5].

A central decision logic based on Boolean logic combines the results of individual protection functions through an OR logic structure. The final trip decision of the proposed relay is implemented using a Boolean OR logic that combines the outputs of all protection elements. The overall trip condition can therefore be expressed as:

$ Trip =O C \vee O V \vee U V \vee O F \vee U F$          (6)

where, OC represents the overcurrent condition, OV denotes the overvoltage condition, UV represents the undervoltage condition, OF denotes the over frequency condition, and UF represents the underfrequency condition. The logical OR operator (V) indicates that the relay issues a trip command when any of the protection conditions is satisfied according to the defined protection thresholds.

This logical formulation ensures coordinated operation of all protection elements within a unified decision framework.

The relay issues a trip command when any of these protection conditions remains active according to the defined timing coordination strategy.

After the completion of every protection operation, the relevant fault code will be generated and sent to the timing logic. The method used here differs from the conventional multi-relay protection scheme, where independent decision-making leads to complexities in fault determination [12-14].

4.4 Timing characteristics and coordination strategy

The proposed relay uses dual-mode timing schemes that offer an optimal trade-off between fast fault selection and selectivity:

(1) Definite-Time Delay Mode:

The definite-time delay applied to voltage and frequency disturbances can be expressed as:

$t_{\text {trip }}=\left\{\begin{array}{rr}t+T_d & \text { if Fault code } \in\{1,2,3,4\} \\ t+T_i & \text { if Fault code }=5\end{array}\right.$       (7)

where, $t_{\text {trip }}$ represents the relay tripping time, $t$ is the instant at which the fault condition is detected, $T_d$ denotes the definite-time delay applied to voltage and frequency disturbances, and $T_i$ represents the instantaneous tripping delay associated with severe overcurrent faults $T_d=200 \mathrm{~ms}$ (definite-time verification delay) $T_i \approx 20 \mathrm{~ms}$ (instantaneous trip delay).

In cases of voltage and frequency-related faults (Fault Codes 1 to 4), the definite time delay function is employed. When the fault occurs, the timing counter starts, and the tripping signal is sent only if the fault is sustained for an elapsed time of 200 ms. In the case where the fault is removed within the time delay, the relay undergoes self-resetting. This method satisfies standard protection coordination principles used in power system relaying [5, 7, 9].

(2) Instantaneous Tripping Mode:

Significant overcurrent values (Fault Code 5), normally related to short-circuit faults, cause immediate trip actions without any intentional delay. This helps in fault isolation within a cycle of simulation (around 20 ms), hence reducing heat and torque stress on the generator and transformer, as recommended [5, 7] for high-level faults.

The coordination of timings allows the relay to distinguish between transient and permanent faults while still acting quickly on faults of significance

4.5 Practical significance of the proposed model

The proposed protection model provides a practical method for the comprehensive protection of generators and transformers in medium-voltage power systems. The proposed UPR improves selectivity, coordination, and diagnostics in comparison with traditional protection methods [13, 14] by incorporating different protection methods in one deterministic model. In addition, the proposed model has the flexibility to be developed in the future by including differential protection methods, harmonic restraint, and adaptive setting methods, which are highly emphasized in modern protection research [1, 6].

Modern protection research emphasizes the need for integrated and coordinated relay architectures capable of operating reliably under increasingly complex power system conditions [18, 20].

It is important to note that, normally, differential protection is used as the main protection for generator transformer units. This study aims to prove the feasibility of an integrated deterministic protection scheme, which incorporates various auxiliary protection functions. In the future, this study will be extended to incorporate various components of differential protection and harmonic restraint to achieve a fully integrated protection scheme.

4.6 Consideration of transformer inrush conditions

In fact, transformer energization can produce magnetizing inrush currents, which can be several times higher than the rated current and can even initiate instantaneous overcurrent protection. However, these types of inrush currents have high levels of harmonic content and usually have a short duration. In fact, numerical relays usually incorporate features such as harmonic restraint or blocking functions. Although the simulation model does not have an explicit feature for harmonic restraint, it is possible to easily incorporate this feature by means of the UPR architecture. Future work will incorporate harmonic-based blocking methods to further improve relay security during transformer energization.

The overall UPR architecture and its internal subsystems are illustrated in Figures 1-3.

Figure 1. Universal Protection Relay (UPR) block

Figure 2. Subsystem of the Universal Protection Relay (UPR) block

Figure 3. Properties of the Universal Protection Relay (UPR) block

In this paper, the design and simulation validation of a UPR with multi-functionality capabilities for the generator and transformer combination has been proposed to overcome the real-life constraints associated with the use of separate protection relays with fixed and separately designed settings. Unlike the function or data-related designs proposed in the previous research studies, the design of the proposed relay in this paper utilizes a deterministic universal protection scheme that combines overcurrent, over/under voltage, and frequency protection in a single logic platform with coordination capabilities. A fault categorization scheme with a dual timing mode was used to differentiate transient and permanent fault conditions. Simulation results using the MATLAB/Simulink environment reveal that the designed UPR is capable of quickly isolating severe short-circuit faults (Fault Code 5) by instantaneous tripping within 20 ms, and the relay is capable of maintaining selective and coordinated protection for voltage and frequency disturbances by means of 200 ms definite time delay (Fault Codes 1–4). The relay worked properly and remained stable under both normal and fault operating conditions, including symmetrical and unsymmetrical faults, and various voltage and frequency deviations. These results validate the efficiency of the proposed protective scheme to increase the fault discrimination and operating reliability of generator-transformer units. Even though the research is limited to the simulation-based evaluation, the proposed work establishes a rationale for the practical and standards-compliant solution for the integrated generator-transformer protection scheme. The future research will focus on the development of the relay scheme to include the differential and harmonic restraint protection schemes and the implementation of real-time and hardware-in-the-loop tests to evaluate the scheme.

Future work will focus on hardware-in-the-loop implementation and real-time digital simulation to further validate the proposed protection algorithm under practical operating conditions.