DSP Implementation of the Discrete Fourier Transform Using the CORDIC Algorithm on Fixed Point

DSP Implementation of the Discrete Fourier Transform Using the CORDIC Algorithm on Fixed Point

Youness Mehdaoui* Rachid El Alami

Research Team in Electronics, Instrumentation and Measurements, USMS, Béni-mellal 23030, Morocco, Computer and Interdisciplinary Physics Laboratory, USMBA, Fez, Morocco, USMBA, Fez 30003, Morocco

LESSI Laboratory, Department of Physics, Faculty of Sciences Dhar El Mehraz, Fez 30003, Morocco

Corresponding Author Email: 
youness.mehdaoui@gmail.com
Page: 
123-126
|
DOI: 
https://doi.org/10.18280/ama_b.610303
Received: 
16 July 2018
| |
Accepted: 
25 Auguet 2018
| | Citation

OPEN ACCESS

Abstract: 

Fourier transform is a tool enabling the understanding and implementation of a large number of numerical methods for signal and image processing. This tool has many applications in domains such as vocal recognition, image quality improvement, digital transmission, the biomedical sector and astronomy.

This paper proposes to focus on the design methodology and experimental implementation of Discrete Fourier Transform (DFT). The interest of this work is an improvement which makes it possible to reduce the processing time of calculates the DFT while preserving the best performances by using the operator CORDIC and the fixed point, so this work is compared with the results found in the literatures.

Keywords: 

DFT, cordic, fixed point, dsp, time of processing

1. Introduction
2. Discrete Fourier Transform
3. CORDIC Operator
4. Fixed-Point Development
5. the Proposed Implementation of the CORDIC Algorithm
6. The Proposed Implementation of the DFT
7. DSP Implementation
8. Conclusion
  References

[1] Proakis JG, Manolakis DG. (1996). Digital signal processing, principles, algorithms and applications. Prentice Hall India Publication 459-462. 

[2] Volder JE. (1959). The CORDIC trigonometric computing technique. IRE Transactions on Electronic Computers (3): 330-334. http://dx.doi.org/10.1109/TEC.1959.5222693

[3] Andraka R. (1998). A survey of CORDIC algorithms for FPGA based computers. Proc. of the 1998 CM/SIGDA Sixth International Symposium on FPGAs, Monterey, CA. 191-200. http://dx.doi.org/10.1145/275107.275139

[4] Parhami B. (2010). Computer Arithmetic. Oxford University Press, 361-371. 

[5] Debaprasad De, Gaurav Kumar K, rchisman Ghosh, Anurup Saha. (2017). FPGA implementation of discrete fourier transform using CORDIC algorithm. Advances in Modelling and Analysis B 60(2): 332-337. http://dx.doi.org/10.18280/ama_b.600205

[6] Despain AM. (1979). Very fast fourier transform algorithms hardware for implementation. IEEE Transactions on Computers C-28(5): 333–341. http://dx.doi.org/10.1109/TC.1979.1675363

[7] Despain AM. (1974). Fourier transform computers using CORDIC iterations. IEEE Transactions on Computers C-23(10): 993–1001. http://dx.doi.org/10.1109/T-C.1974.223800

[8] RAO SK. (1984). Orthogonal digital filters for VLSI implementation. IEEE Transactions on circuits and systems CAS 31(11). http://dx.doi.org/10.1109/TCS.1984.1085452

[9] Sung TY, Hu YH. (1986). VLSI Implementation of real-time Kalman filter, Acoustics, Speech, and Signal Processing. IEEE International Conference on ICASSP 86(11): 2223–2226. http://dx.doi.org/10.1109/ICASSP.1986.1169136

[10] Ahmed HM, Delosme JM, Morf M. (1982). Highly concurrent computing structures for matrix arithmetic and signal processing. Computer 15(1): 65–82. http://dx.doi.org/10.1109/MC.1982.1653828.

[11] Joseph R, Franklin C, Luk T. (1988). CORDIC Arithmetic for an SVD Processor. J. Parallel Distrib. Comput. 5(3): 271–290. http://doi.org/10.1109/ARITH.1987.6158686

[12] Andraka R. (1998). A survey of CORDIC algorithms for FPGA based computers. ACM 0 89791978-5/98/01. http://dx.doi.org/10.1145/275107.275139

[13] Kum KI, Kang J, Sung W. (2000). AUTOSCALER for C: An optimizing floating-point to integer C program converter for fixed-point digital signal processors. IEEE Transactions on Circuits and Syst—Part II 47(9): 840–848. http://doi.org/10.1109/82.868453

[14] Willems M, Bursgens V, Meyr H. (1997). FRIDGE: floating point programming of fixed-point digital signal processors. In Proceeding of 8th International Conference on Signal Processing Applications and Technology (ICSPAT ’97), SanDiego, Calif, USA.

[15] DSPArithmeticTutorial. (2008). Texas Instrument.

[16] Menard D, Chillet D, Sentieys O. (2006). Floating-to-Fixed-Point Conversion for Digital Signal Processors. EURASIP Journal on Applied Signal Processing 1–19. http://dx.doi.org/10.1155/ASP/2006/96421

[17] Grotker T, Multhaup E, Mauss O. (1996). Evaluation of HW/SW tradeoffs using behavioral synthesis. In Proceeding of 7th International Conference on Signal Processing Applications and Technology(ICSPAT’96), 781–785, Boston, Mass, USA.

[18] Mehdaoui Y, Mrabti M. (2010). A faster MC-CDMA system using a DSP implementation of the FFT, 5th International Symposium On I/V Communications and Mobile Network, Rabat, Morocco. http://dx.doi.org/10.1109/ISVC.2010.5656245

[19] Anurup Saha, Archisman Ghosh, K. Gaurav Kumar. (2017). FPGA implementation of arcsine function using CORDIC algorithm. Advances in Modelling and Analysis A 54(2): 197-202. http://doi.org/10.18280/ama_a.540205